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1、DesignforthefirfilterbasedondspbuilderDspbuilderprofileandbasicdesignprocessFirdesignprocessandsomethingneedtopayattentionDspbuilderprofiledspbuilderisasystem-level(oralgorithm-level)designtools,itisonthetopofmultiplesoftware,itconnectssystemlevel(algorithmsimulationmodeling)andRTL-level(har
2、dware)twodesigntoolstogetherandplacesthemintheMatlab/simulinkgraphicdesignplatform,theQuartusIIastheunderlyingdesigntoolsissetbackground,toplaythegreatestadvantageofvarietytools.Dspbuilderbasicdesignprocess1、designmodelinSimulink:calldspbuilderandothergraphicalmodulesintheSimulinklibrariesto
3、constitutealgorithm-leveldesignorsystem-leveldesignblockdiagram.2、SystemSimulationinSimulink:useSimulinkgraphicalsimulation、analysisfunctiontoanalysisthismodelcorrectness.3、DspBuildercompletesVHDLconversion、compile、synthesis、fitter:useSignalCompilertoconverttheSimulinkmodelfiles(.Mdl)intoaco
4、mmonhardwaredescriptionlanguage,VHDLfiles.4、RTL-levelsimulationinModelsim5、timingsimulationinQuartusIIFirdesignprocessThemostbasicfirfiltercanbeexpressedas:Inwhichx(n)istheinputsamplesequence,h(n)isthefiltercoefficient,Listheorderofthefilter,y(n)isthefilter'soutputsequence.FirdesignprocessFo
5、rthefourthorderfirfiltercanbeexpressedasy(n)=Cq[h(0)x(n)+h(1)x(n-1)+h(2)x(n-2)+h(3)x(n-3)+h(4)x(n-4)]Cqisquantizationfactor.ForthedirectItypefirfiltercanbecascaded,sowedesignafourthorderFirfilterfirst,thengeneratethe16orderfirfilterwewantbycascading.FirdesignprocessCreatingtheFIRModel1.Start
6、theMATLABsoftware.2.OntheFilemenu,pointtoNewandclickModeltocreateanewmodelwindow.3.ClickSaveontheFilemenuinthenewmodelwindow.CreatingtheFIRModelOpensimulinkLibraryBrowserbyenteringsimulinkincommandwindow.youcanalsoopensimulinkLibraryBrowserbyusingthetoolbaricon.AddtheDspbuilderBlockaddtheDsp
7、builderBlockthatyouneedintoyourmodelanddouble-clicktheblockinyourmodeltosetthebolckparameters.(NOTE:inordertogenerateVHDLyoumustusetheblockinDspbuilderBlock)Connecteveryblockinthemodelconnecteveryblockinthemodelasshownabove.(NOTE:asthisblockisused