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1、13-6-14MechanicalSympathy:MemoryBarriers/Fences分享17更多下一個網誌?建立網誌登入MechanicalSympathyHardwareandsoftwareworkingtogetherinharmonySunday,24July2011SearchThisBlogMemoryBarriers/FencesSearchInthisarticleI'lldiscussthemostfundamentaltechniqueinconcurrentprogramming
2、knownasmemorybarriers,orUpcomingEventsfences,thatmakethememorystatewithinaprocessorvisibletootherprocessors.PerformanceTestingJavaCPUshaveemployedmanytechniquestotryandaccommodatethefactthatCPUexecutionunitperformancehasApplications-SkillsMatterLondongreatly
3、outpacedmainmemoryperformance.Inmy“WriteCombining”articleItouchedonjustoneoftheseJavavs.C++PanelDebate-techniques.ThemostcommontechniqueemployedbyCPUstohidememorylatencyistopipelineinstructionsandGOTOChicagothenspendsignificanteffort,andresource,ontryingtore
4、-orderthesepipelinestominimisestallsrelatedtocacheTop10PerformanceFolklore-misses.GOTOChicagoWhenaprogramisexecuteditdoesnotmatterifitsinstructionsarere-orderedprovidedthesameendresultisachieved.Forexample,withinaloopitdoesnotmatterwhentheloopcounterisupdate
5、difnooperationwithintheloopAboutMeusesit.ThecompilerandCPUarefreetore-ordertheinstructionstobestutilisetheCPUprovideditisupdatedbytheMartinThompsontimethenextiterationisabouttocommence.Alsoovertheexecutionofaloopthisvariablemaybestoredinaregisterandneverpush
6、edouttocacheormainmemory,thusitisnevervisibletoanotherCPU.Technologygeekexploringthecapabilitiesofmodernhardware.CPUcorescontainmultipleexecutionunits.Forexample,amodernIntelCPUcontains6executionunitswhichcandoAvailablefordevelopment,training,performancetuni
7、ng,andacombinationofarithmetic,conditionallogic,andmemorymanipulation.Eachexecutionunitcandosomecombinationconsultingservices.ofthesetasks.Theseexecutionunitsoperateinparallelallowinginstructionstobeexecutedinparallel.Thisintroducesanotherlevelofnon-determin
8、ismtoprogramorderifitwasobservedfromanotherCPU.ViewmycompleteprofileFinally,whenacache-missoccurs,amodernCPUcanmakeanassumptionontheresultsofamemoryloadandPopularPostscontinueexecutingbasedonthi
