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1、畢業(yè)設(shè)計(jì)(論文)外文資料翻譯系別:電子信息系專(zhuān)業(yè):通信工程班級(jí):姓名:學(xué)號(hào):外文出處:附件:1.原文;2.譯文2014年03月AnIntroductiontotheARM7ArchitectureTrevorMartinCEng,MIEETechnicalDirectorThisarticlegivesanoverviewoftheARM7architectureandadescriptionofitsmajorfeaturesforadevelopernewtothedevice.Futurearticleswillexamineoth
2、eraspectsoftheARMarchitecture.BasicCharacteristicsTheprinciplefeatureoftheARM7microcontrolleristhatitisaregisterbasedload-and-storearchitecturewithanumberofoperatingmodes.WhiletheARM7isa32bitmicrocontroller,itisalsocapableofrunninga16-bitinstructionset,knownas"THUMB".This
3、helpsitachieveagreatercodedensityandenhancedpowersaving.Whilealloftheregister-to-registerdataprocessinginstructionsaresingle-cycle,otherinstructionssuchasdatatransferinstructions,aremulti-cycle.Toincreasetheperformanceoftheseinstructions,theARM7hasathree-stagepipeline.Due
4、totheinherentsimplicityofthedesignandlowgatecount,ARM7istheindustryleaderinlow-powerprocessingonawattsperMIPbasis.Finally,toassistthedeveloper,theARMcorehasabuilt-inJTAGdebugportandon-chip"embeddedICE"thatallowsprogramstobedownloadedandfullydebuggedin-system.Inordertokeep
5、theARM7bothsimpleandcost-effective,thecodeanddataregionsareaccessedviaasingledatabus.ThuswhiletheARM7iscapableofsingle-cycleexecutionofalldataprocessinginstructions,datatransferinstructionsmaytakeseveralcyclessincetheywillrequireatleasttwoaccessesontothebus(onefortheinstr
6、uctiononeforthedata).Inordertoimproveperformance,athreestagepipelineisusedthatallowsmultipleinstructionstobeprocessedsimultaneously.Thepipelinehasthreestages;FETCH,DECODEandEXECUTE.Thehardwareofeachstageisdesignedtobeindependentsouptothreeinstructionscanbeprocessedsimulta
7、neously.Thepipelineismosteffectiveinspeedingupsequentialcode.Howeverabranchinstructionwillcausethepipelinetobeflushedmarringitsperformance.AsweshallseelatertheARM7designershadsomecleverideastosolvethisproblem.Fig1ARM3-StagepipelineARM7ProgrammingModelTheprogrammer'smodelo
8、ftheARM7consistsof15userregisters,asshowninFig.3,withR15beingusedastheProgramCounter(PC).Sinceth