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1、領(lǐng)步電氣VerilogHDL代碼規(guī)范FPGA組VerilogHDL代碼規(guī)范(僅內(nèi)部使用)文檔作者:馮仁委日期:2013-8-5審批:日期:領(lǐng)步電氣VerilogHDL代碼規(guī)范內(nèi)部公開修訂記錄日期修訂版本描述作者2013-8-51.00初稿完成馮仁委2013-08-05版權(quán)所有侵權(quán)必究2領(lǐng)步電氣VerilogHDL代碼規(guī)范內(nèi)部公開目錄VerilogHDL代碼規(guī)范.....................................................................
2、.................................................1修訂記錄...........................................................................................................................................2目錄......................................................
3、............................................................................................31.目的...........................................................................................................................................42.范圍.........
4、..................................................................................................................................43.定義...................................................................................................................
5、........................44.規(guī)范內(nèi)容...................................................................................................................................41)可綜合設(shè)計(jì)................................................................................
6、.......................................4a)命名規(guī)范...................................................................................................................4b)模塊規(guī)范..................................................................................
7、.................................7c)NetandRegister......................................................................................................12d)Expressions...................................................................................
8、...........................13e)For語(yǔ)句..................................................................................................................13f)If語(yǔ)句............................................................................................